1. Field of the Invention
The present invention relates to pixel structures and, more particularly, to pixel structures of liquid crystal display (LCD) devices.
2. Description of the Related Art
FIG. 1A, FIG. 1B, and FIG. 1C are cross sections of pixel structures of a vertical alignment (VA) mode, a multi-domain vertical alignment (MVA) mode, and patterned vertical alignment (PVA) mode, respectively. Generally, concerning the vertical alignment (VA) mode, a lower substrate 10 includes a transparent electrode 11 (e.g., indium tin oxide (ITO)) with a slits SL design such that rotation of the liquid crystal (LC) molecules is consistent with distribution of the electric field E generated therefrom. Regarding the multi-domain vertical alignment (MVA) mode, distribution of electrical field is generated between protrusions 15 on the upper substrate 13 and the slits SL of the transparent electrode 11 (e.g., indium tin oxide (ITO)) on the lower substrate 10 to drive liquid crystal (LC) molecule rotation. As for the patterned vertical alignment (PVA) mode, distribution of the electrical field is generated from patterned slits SL of the transparent electrode 11 (e.g., indium tin oxide (ITO)) on both the upper and lower substrate to drive liquid crystal (LC) molecule rotation. FIG. 2A and FIG. 2B are simulated LC distribution diagrams of the VA mode and MVA mode, respectively, after applying voltage of 20 ms. Generally, response of the VA mode is slow, particularly at the central region of the electrodes, as shown in FIG. 2A. After the electrodes are applied a voltage, LC molecules begin to tilt from the slits SL of the transparent electrode 21 (e.g., indium tin oxide (ITO)) on the lower substrate 20. The LC molecules at the central region do not tilt at 20 ms, and completely tilt (not shown) following 40 ms. The LC molecules of the MVA mode have a pre-tilt angle due to protrusions 25 on the upper substrate 23. Therefore, the LC molecules at the entire region is completely tilted down after a 20 ms response time, as shown in FIG. 2B. When compared to the conventional VA mode, the MVA mode and PVA mode have the following drawbacks: First, an additional process step is needed on the upper substrate. The MVA mode requires an additional process step to create protrusions. The PVA mode requires an additional process step to create the slits SL of the transparent electrode 21 (e.g., indium tin oxide (ITO)). Second, since protrusions on the upper substrate of the MVA mode result in a pre-tilt angle of the LC molecules, light leakage during the dark state can occur at this region. Third, since the PVA mode does not have a pre-tilt angle, LC response is slower than the MVA mode. Fourth, since the MVA mode and the PVA mode require configuration between the upper and lower substrates to create an ideal electrical field distribution, fabrication processes are more stringent, and alignment between the upper and lower substrates must be done precisely. If not done the above-mentioned processes and/or alignment requested, the response at the left and right regions of a pixel can be inconsistent, further resulting in response delay of the entire display panel and simultaneously creating an additional disclination line, thus reducing transparency.
According to the abovementioned problems, a technique of forming a control electrode CE and is directly formed on the lower substrate is proposed to create an electrical field, tilting LC molecules, as shown in FIG. 3. Meanwhile, driving methods can be primarily divided into the following three categories.
The first driving method is direct driving methods which are disclosed in U.S. Pat. No. 6,407,791, U.S. Pub. No. 2003/0112397, and U.S. Pub. No. 2004/0046914, the entirety of which is hereby incorporated by reference. A voltage is directly applied to the control electrode CE of the lower substrate, the control electrode CE is directly formed on the lower substrate. Since the LCD panel is driven line-by line downwardly and positive and negative half-periodically switched, the voltage of the control electrode is changed as the pixel electrode is driven. Thus, an additional set of integrated circuits, is needed to drive the control electrode and to transform the voltage to synchronize with the scan lines, as shown in FIG. 4, wherein reference 21 denotes potential of the common electrode, reference 22 denotes image signal of odd rows, reference 23 denotes the signal of the nth column scan line, reference 24 denotes the signal of the n+1th column scan line, reference 25 denotes the signal of the control electrode above the nth column, reference 26 denotes the signal of the control electrode under the nth column, reference 27 denotes the signal of the control electrode above the n+1th column, and reference 26 denotes the signal of the control electrode under the nth column. The drawbacks of this driving method are: first, an additional set of driving integrated circuit is needed resulting in higher production costs; and second, the driving integrated circuit of the conventional LCD panel does not support this driving method.
The second driving method is disclosed in U.S. Pat. Nos. 6,466,293 and 6,515,719, U.S. Pub. Nos. 2002/0019813 and 2004/0135147, the entirety of which is hereby incorporated by reference. The device is described as the followings. Data lines DL and scan lines SL, respectively, represent conductive lines for driving signals on the thin film transistor TFT. Common electrode lines COM represent conductive lines providing a common voltage Vcom. This type of driving method allows the pixel electrode to be at a floating state. The voltage of the pixel electrode PE is controlled by capacitance coupling with the control electrode CE, as shown in FIG. 5A and FIG. 5B. When a voltage VDE is applied on the control electrode CE to induce a control electrode voltage VCE, the potential Vp of the pixel electrode is coupled to a lower potential by the capacitor Cc (which is consisted of a control electrode CE and a pixel electrode PE). The voltage relationship is expressed as
  Vp  =            V      DE        ×                  Cc                  Cc          +                      C                          L              ⁢                                                          ⁢              C                                          .      However, this driving method has the following problems. First, the pixel electrode is under a floating state, so static charges are prone to accumulate on the electrode without drainage paths, thereby resulting in image sticking. Second, since the pixel electrode voltage is generated by coupling capacitance Cc, the voltage on the pixel electrode is lower the conventional driving voltage of the pixel electrode, resulting in deteriorated transparency. To improve this phenomenon, the driving voltage value on the data lines has to increase. Namely, the driving integrated circuit has to adopt a high amplitude voltage (such as increasing driving voltage from 5V to 7V). This kind of driving integrated circuit is difficult to fabricate and has higher power consumption.
The third type of driving method is disclosed in U.S. Pub. Nos. 2004/0046914 and 2004/0135147, the entirety of which is hereby incorporated by reference. Several thin film transistors (TFT) are used to drive voltage on each control electrode and pixel electrode, respectively, at different time periods. The equivalent circuit of this driving method is shown in FIG. 6 which is described as follows. VCE and Vp, respectively, represent the voltage on the control electrode and the pixel electrode. The scan line n and the data line n, respectively, represent the scan and data lines for driving the pixel electrode. The scan line n−1 represents the scan line for controlling the upper last pixel electrode. The data line n-1 represents data line for the left pixel electrode. Under a dot inversion driving condition, the polarities of the driving voltages on both the left and right sides and both the upper and lower sides are inverted. When the last scan line n−1 is switched on, transistors TFT2 and TFT3 are also switched on and positive polarity of voltage Vd2 and negative polarity of voltage Vd3 are respectively applied on the control electrode VCE and the pixel electrode Vp. When the last scan line n−1 is switched off, transistors TFT2 and TFT3 are also switched off and the voltage on the control electrode VCE is Vd2 and the voltage on the pixel electrode Vp is Vd3. When the scan line n is switched on, transistor TFT1 is also switched on, and the voltage on the pixel electrode is raised from −Vd3 to +Vd1, while the voltage on the control electrode is raised by the coupling capacitance Cc to the product of Vd2 plus (Vd1−(−Vd3)) and the value of capacitance coupling. This driving method has the following problems. First, voltage VCE is determined by signals Vd2 and Vd3 of the last frame. While voltage VCE can affect the brightness of the pixel, the upper last and lower next pixel are affected by each other. Second, there are too many thin film transistors in a single pixel, thereby increasing production complexity.